I am Rajeev Pandey, Welcome to my home Page. I work in the area of analog & mixed-signal circuit design. Currently I am Pursuing my PhD in IC Design From National Yang-Ming Chiao Tung University, Hsinchu Taiwan. Beside this I was a Summer Analog Design intern at MediaTek (2020).
I have done my Master of technology in Integrated Electronics and Circuits from Department of Electrical engineering at the Indian Institute of Technology Delhi (IITD). I did my B.Tech in Electronics and Communication Engineering from Uttar Pradesh Technical University.
AREA OF INTEREST
- Analog and Mixed Signal Circuit Design
- Digital Design- Verilog, Physical Design
Current Research: I am working, to design an on-chip adaptive automatic control PPG readout system for the OLED-OPD flexible patch sensor which is highly focused to minimize the effect of motion artifact as well as skin & tissue orientation impact.